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TaPaSCo Tutorial

Time: Thursday, 2019-04-11, 13:15PM - 17:15PM

Room: Altes Maschinenhaus, S1|05/23

Specialized accelerators in a heterogeneous system play a vital role in providing enough compute power for current and upcoming computational tasks. Field-programmable gate arrays (FPGA) are an established platform for such custom and highly specialized accelerators. However, an accelerator implementation alone is only part of the way to a usable system. In order to be used as a specialized co-processor in a heterogeneous setup, the accelerator still needs to be integrated into the overall system and requires a connection to the host (typically a software-programmable CPU) and often also external memory.

The open-source TaPaSCo (Task-Parallel System Composer) framework was created to serve exactly this purpose: The fast integration of FPGA-based accelerators into heterogeneous compute platforms or systems-on-chip (SoC) and their connection to relevant components on the FPGA board.

TaPaSCo can support developers in all steps of the development process of heterogeneous systems:

  • From cores resulting from High-Level Synthesis or cores manually written in an HDL, a complete FPGA-design can be created. TaPaSCo will automatically connect all processing elements to the memory- and host-interface and generate a complete bitstream.

  • The TaPaSCo Runtime API allows to interface with accelerator from software and supports operations such as transferring data to the FPGA memory, pass values to accelerator cores and control the execution of the processing elements.

Our tutorial is going to illustrate how TaPaSCo can support developers designing FPGA-based heterogeneous systems in their work or research. Through a combination of short presentations and hands-on sessions, we want to teach the participants everything they need to know to get started with heterogeneous system design with the TaPaSCo framework. The tutorial is going to cover all steps of the development process, as well as the interfacing using the TaPaSCo API. As TaPaSCo is released open-source under the permissive GNU LGPLv3 license, it is available at no cost and users can adapt TaPaSCo to their needs and contribute back to the community.

A separate registration for the tutorial only is available through the registration site. For participants of ARC 2019, the tutorial is already included in the regular conference fee.

Important Dates:

► Paper Submission:
23 November 2018
► Paper Submission:
07 December 2018
No further extension will be granted
► Tutorial Proposals:
18 January 2019
► Author Notification:
18 January 2019
► Camera-ready:
10 February 2019
► Symposium:
09 - 11 April 2019

News:

► 2019-02-11: Registration now open
Registration for the symposium is now open. Information about the registration and a link to the registration site is available.
ARC 2019 will feature a tutorial about the open-source TaPaSCo framework on Thursday afternoon.
► 2018-11-22: Deadline Extended
Due to popular demand, the paper submission deadline for ARC 2019 has been extended to December 7. We will not be able to offer any further extensions beyond that.
► 2018-11-01: Second CFP
The 2nd CFP announces the Program Committee and the planed Tutorials.
► 2018-10-18: Submission open
Manuscripts can now be submitted as described in the author guidelines.
► 2018-09-11: Special issue confirmed
Extended versions of selected papers are invited to a special issue of Springer’s Journal of Signal Processing Systems.
► 2018-08-30: CFP published
The CFP topics have been published.
► 2018-08-22: Deadlines Fixed
The deadlines for paper submission, author notification, and camera ready submission are available.
► 2018-07-31: Hotel rooms reserved
A number of nearby hotel rooms with preferential prices are available.
► 2018-06-27: Schedule changed
The conference date was shifted by one week.

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